There is a new SHARC processor family: the 214xx series. My bet is the new Pod stuff is using a 21469.
I have evaluated the 21469 extensively and while it is a good processor it is only about half as powerful as a TigerSHARC. We are actually working on a new product based on the 21469.
The problem with the SHARCs is several things:
- The core design is very old. They are still using the same basic core from almost 20 years ago.
- The internal bus bandwidth is mediocre. The TigerSHARC has four 128-bit internal data buses that run at full speed which means the core is never starved for data.
- Too few registers. You have to constantly push and pop with the SHARCs because the register file is so small. This increases function overhead so either your functions run slower or you have to increase your block size (and concomitant latency). The TigerSHARC has a huge register file and since there are so many scratch registers you rarely have to save any registers on the stack (this can also be a disadvantage since you have to save all those registers during a context switch so you have to code your interrupts carefully).
- The SIMD implementation is crude. It would take too long to explain the details.
- Small internal memory. The maximum available is 5 Mb IIRC.
- 48-bit instruction word. The long instruction word means instruction use 1.5 times the memory as data does. So that 5 Mb memory is equivalent to 3.3 Mb in practice.
The new SHARCs have on-board accelerators (FIR and IIR). In theory this should be great but unfortunately the accelerators only work at half the clock speed so they don't really buy you much.
One advantage of the new SHARCs is the on-board peripherals. They include SPI, I2S, UARTS, etc. This reduces system cost. The TigerSHARC has no on-board peripherals, it is designed for one thing: number-crunching.
The SHARC is the value line and for the money the new SHARCs are great but a TigerSHARC still easily outperforms them.